1. Field of the Invention
This invention relates to contacts for semiconductor devices, and specifically to contact structures for integrated semiconductor devices that include at least an MOS device and a capacitor element, and a corresponding manufacturing process.
2. Description of the Related Art
As is well known, ferroelectric devices, such as ferroelectric non-volatile memories, are acquiring growing importance in the field of integrated circuits on account of their low consumption and high operational and switching speed compared to conventional non-volatile memories. In particular, special attention is being devoted to forming these ferroelectric devices in combination with CMOS devices integrated on a semiconductor substrate.
A first prior technical solution for forming such ferroelectric devices and their contacts is described in an article xe2x80x9cAdvanced 0.5 um FRAM Device Technology with Full Compatibility of Half-Micron CMOS Logic Devicexe2x80x9d by Yamazachi et al., published in the proceedings of IEDM ""97 Conference, Washington D.C., U.S.A., Dec. 7-10, 1997.
This prior solution for forming ferroelectric devices provides for following the integration of MOS devices such as MOS transistor, etc., on a semiconductor substrate with an insulating layer over the entire chip surface. The ferroelectric device, e.g., a ferroelectric memory is then formed above this insulating layer. Such device comprises conventionally a bottom electrode of metal laid onto the insulating layer.
A layer of a ferroelectric material covers the bottom electrode, and a top electrode of metal is provided on the ferroelectric layer.
After insulating the ferroelectric device by means of another insulating layer, the electric connection between the top electrode and the conduction terminals of the MOS device is established. Great care must be exerted in forming these contacts for electric connection between the ferroelectric devices and the underlying CMOS structures.
In this first prior solution, contact regions are provided for the device formed with CMOS technology by filling with tungsten (W-plug) openings in the insulating layer which overlies the control terminal.
The W-plug technique enables contacts to be defined with high aspect ratio, i.e. a high ratio of the contact depth to width, but is not easy to employ where the W-plugs are to be subjected to thermal treatments in an oxidizing environment during subsequent steps of the fabrication process. Such is the case with ferroelectric devices: the processing of the main ferroelectric materials indeed provides, following definition of the ferroelectric material, for the application of treatments at temperatures in the range of 500xc2x0 to 850xc2x0 C., in the presence of oxygen.
In that case, tungsten contacts should be sealed in by barrier layers, formed of non-standard materials, during the integrated circuit fabrication process to prevent the tungsten from giving rise to such volatile materials as W2O5 in the temperature range of 500xc2x0 to 800xc2x0 C. These temperatures are in fact temperatures used for the annealing and crystallization processes required to complete the ferroelectric devices.
Similar considerations apply to the instance of the contact regions being filled with polysilicon (polySi plugging) which will oxidize and become insulative once subjected to the thermal treatments involved in the crystallization of ferroelectric materials.
However, the introduction of such process steps for making these nonstandard barrier layers adds substantially to the complexity of the fabrication process.
It should be noted that according to the above reference, the interconnection of the CMOS technology device and the ferroelectric device is provided by a layer of titanium nitride (TiN) being indicated there as a local interconnection.
Embodiments of this invention provide contacts which can be readily integrated to integrated circuits comprising electronic devices formed by MOS or CMOS processes, and having such structural and functional features as to afford improved integratability to these integrated electronic devices, thereby overcoming the limitations and/or the problems which beset prior art contacts for ferroelectric devices.
While its application to ferroelectric devices is specially advantageous, embodiments of the invention have a broad range of uses, it being possible to apply them to any devices wherein a contact of an oxidation-resistant material is to be substituted for a contact formed of a conductive material (W or PolySi plug). In particular, the invention can be applied to circuit structures including at least one component of the MOS or CMOS types and at least one capacitor element.
One of the concepts behind embodiments of this invention provides contacts for semiconductor devices comprising a coating with a barrier of a conductive material filled with an insulating material, this conductive coating is used to establish an electric connection between the bottom and top parts of the contact.
The features and advantages of a device according to the invention will be apparent from the following description of an embodiment thereof, to be read by way of non-limitative example in conjunction with the accompanying drawings.